1. Field of Invention
This invention relates to a graphics display system which may be more particularly described as a graphics display system having a random access memory with a split serial register arrangement.
2. Description of the Related Art
In a typical random access memory, the time required for accessing a row is approximately twice as long as the time required for accessing a column. For speedy overall operation, it is desirable to access a row and hold it while several of the columns are accessed along that row. This is referred to as "page mode" operation. If all of the columns across the array are accessed during a single row access, time saved may be as much as 50-70 percent. Such time saving may be achieved during memory write or during memory read operations. For any specific system design there may be trade-offs between memory write time and memory read time to achieve operating efficiency.
For computer graphics system applications, further trade-offs can be made between memory read and write times and the capability and speed of a microprocessor used for generating the data to be presented on a video screen. Other factors to be considered include the width and height of the display, the size of the video random access memory and whether the system is line oriented or tile oriented. Final choices among the several trade-offs is a matter left for the system designer or user.
Suppliers of devices which may be used in such applications prefer to manufacture devices that include several optional features so that designers and users will apply each type of device in many different applications. This enables one device design effort to result in large manufacturing runs and low costs per device.
In furtherance of the aforementioned design strategy, integrated circuit manufacturers have been improving the designs of video random access memory integrated circuit devices by adding features which increase the flexibility and speed of operation of those devices. Some of the features which have been added to random access memory designs include the addition of split serial registers to improve access to and from the memory array and selectable taps for readout from the split serial registers. These features enable the user to closely pack data into the video random access memory and to thereby avoid wasting memory space.
As previously mentioned, there are two modes of operation, i.e., line oriented and tile oriented. In line oriented operation, the graphics processor generates and stores data in sequential order as it will appear line-by-line on the display. Storage of data in the video random access memory and read out from storage to the display are accomplished in serial order bit-by-bit and line-by-line. Read out from the split serial register to the display is timed to correlate with the display sweep signal. Prior video random access memory device designs have features which are very desirable and are in wide spread use in line oriented systems.
Prior video random access memory device designs are much less flexible and useful with respect to tile oriented systems. Typically, a tile oriented display is divided into a grid of equal size and shape areas, called tiles. The size and shape of the tiles are factors which are among the factors to be chosen by the system designer or user. For instance, the tiles may be squares or rectangles. If rectangles, they may be oriented with the long dimension either laying horizontally or standing vertically. For some tile sizes and orientations, currently available video random access memory devices lack sufficient flexibility for efficient use in some possible system applications. More specifically, the data representing a single tile must be stored in different rows of the storage cells of the random access memory array.